1. Field of the Invention
This invention relates to circuits for controlling gas discharge devices, especially multiple gas discharge display/memory devices which have an electrical memory and which are capable of producing a visual display or representation of data.
2. Description of the Prior Art
Heretofore, multiple gas discharge display and/or memory panels have been proposed in the form of a pair of dielectric charge storage members which are backed by electrodes, the electrodes being so formed and oriented with respect to an ionizable gaseous medium as to define a plurality of discrete gas discharge units or cells. The cells have been defined by a surrounding or confining physical structure such as the walls of apertures in a perforated glass plate sandwiched between glass surfaces and they have been defined in an open space between glass or other dielectric backed with conductive electrode surfaces by appropriate choices of the gaseous medium, its pressure and the electrode geometry. In either structure, charges (electrons and ions) produced upon ionization of the gas volume of a selected discharge cell, when proper alternating operating voltages are applied between the opposed electrodes, are collected upon the surface of the dielectric at specifically defined locations. These charges constitute an electrical field opposing the electrical field which created them so as to reduce the voltage and terminate the discharge for the remainder of the cycle portion during which the discharge producing polarity remains applied. These collected charges aid an applied voltage of the polarity opposite that which created them in the initiation of a discharge by imposing a total voltage across the gas sufficient to again initiate a discharge and a collection of charges. This repetitive and alternating charge collection and ionization discharge constitutes an electrical memory.
An example of a panel structure containing non-physically ioslated or open discharge cells is disclosed in U.S. Pat. No. 3,499,167 issued to Theodore C. Baker, et al. Physically isolated cells have been disclosed in the article by D. L. Bitzer and H. G. Slottow entitled "The Plasma Display Panel - A Digitally Addressable Display With Inherent Memory" Proceeding of the Fall Joint Computer Conference, I E E E, San Francisco, Cal., November 1966, pp 541-557 and in U.S. Pat. No. 3,559,190.
In the operation of the display/memory device an alternating voltage is applied, typically, by applying a first periodic voltage wave form to one array and applying a cooperating second wave form, frequently identical to and shifted on the time axis with respect to the first wave form, to the opposed array to impose a voltage across the cells formed by the opposed arrays of electrodes which is the algebraic sum of the first and second wave forms. The cells have a voltage at which a discharge is initiated. That voltage can be derived from an externally applied voltage or a combination of wall charge potential and an externally applied voltage. Ordinarily, the entire cell array is excited by an alternating voltage which, by itself, is of insufficient magnitude to ignite gas discharges in any of the elements. When the walls are appropriately charged, as by means of a previous discharge, the voltage applied across the element will be augmented, and a new discharge will be ignited. Electrons and ions again flow to the dielectric walls extinguishing the discharge. However, on the following half cycle, their resultant wall charges again augment the applied external voltage and cause a discharge in the opposite direction. The sequence of electrical discharges is sustained by an alternating voltage signal that, by itself, could not initiate that sequence.
In addition to the sustaining voltage, there are manipulating voltages or addressing voltages imposed on the opposed electrodes of a selected cell or cells to alter the state of those cells selectively. One such voltage, termed a "writing voltage" transfers a cell or discharge site from the quiescent to the discharging state by virtue of a total applied voltage across the cell sufficient to make it possible that on subsequent sustaining voltage half cycles the cell will be in the "on state". A cell in the "on state" can be manipulated by an addressing voltage, termed an "erase voltage", which transfers it to the "off state" by imposing sufficient voltage to draw off the surface or wall charges on the cell walls and cause them to discharge without being collected on the opposite cell walls in an amount such that succeeding sustainer voltage transistions are not augmented sufficiently by wall charges to ignite discharges.
A common method of producing writing voltages is to superimpose voltage pulses on a sustainer wave form in an aiding direction and cumulatively with the sustainer voltage, the combination having a potential of enough magnitude to fire an "off state" cell into the "on state". Erase voltages are produced by superimposing voltage pulses on a sustainer wave form in opposition to the sustainer voltage to develop a potential sufficient to cause a discharge in an "on state" cell and draw the charges from the dielectric surfaces such that the cell will be in the "off state". The wall voltage of a discharged cell is termed an "off state wall voltage" and frequently is midway between the extreme magnitude limits of the sustainer voltage.
Cells are transferred to the "on state" by applying a portion of the manipulating signal superimposed on the sustaining voltage, termed a "select signal", on each of two opposed electrode portions which are proximate the cell. Conventionally, like sustaining signals are imposed on each electrode array so that half the sustaining voltage is imposed on each array and half the select signal is imposed on the addressed cell electrode in each electrode array at a time when the sum of the applied voltages is sufficient to ignite a discharge. Further, the partial select signals on each electrode are limited to a value which will not impose a firing potential across other cells defined by that electrode and not selected. A typical write signal for a cell is developed by applying half select voltages to the addressed electrodes of the cell to be placed in the "on state" at a time the sustaining voltages are developing a pedestal potential somewhat below the maximum sustaining voltage. Typically, a write signal is imposed on each opposed electrode portion of the cell during the terminal portion of a sustain voltage half cycle when any wall charging which may result from the prior sustainer transient is substantially completed. The manipulating signal thus ignites a single, and unique, cell at the intersection of the selected two opposed electrodes. This ignited discharge thus establishes the cell in the "on state" since a quantity of charge is stored in the cell such that, on each succeeding half cycle of the sustaining voltage, a gaseous discharge will be produced.
In order to erase a cell or transfer it from the "on state" to the "off state", the erase signal is imposed as a firing voltage which extends from the sustainer voltage toward and through the neutral wall charge voltage level. As for writing, the erase manipulation is facilitated if the sustaining voltage is at a pedestal level below the level providing the maximum applied voltage so that the erase partial select voltages are at a convenient level. Typically, an erase signal is imposed on each opposed electrode portion of the cell during the terminal portion of a sustain voltage half cycle, when the wall charging from the prior sustainer discharge is substantially completed, but preceding the next half cycle alternation by enough time so that the wall discharge of the selected cell is substantially stabilized.